Fix MISRA Rule 5.3 Part 2

Use a _ prefix for Macro arguments to prevent that argument from
hiding variables of the same name in the outer scope

Rule 5.3: An identifier declared in an inner scope shall not
          hide an identifier declared in an outer scope

Fixed For:
    make LOG_LEVEL=50 PLAT=fvp

Change-Id: I67b6b05cbad4aeca65ce52981b4679b340604708
Signed-off-by: Daniel Boulby <[email protected]>

diff --git a/common/tf_printf.c b/common/tf_printf.c
index d40398338137627bf94fcd2c00bc916da3c0a0fc..9d8333a6b0811dde334e188e8830c557524bb3fe 100644 (file)
--- a/common/tf_printf.c
+++ b/common/tf_printf.c
@@ -15,13 +15,13 @@
  * The tf_printf implementation for all BL stages
  ***********************************************************/
 
-#define get_num_va_args(args, lcount) \
-       (((lcount) > 1) ? va_arg(args, long long int) : \
-       ((lcount) ? va_arg(args, long int) : va_arg(args, int)))
+#define get_num_va_args(_args, _lcount) \
+       (((_lcount) > 1) ? va_arg(_args, long long int) :       \
+       ((_lcount) ? va_arg(_args, long int) : va_arg(_args, int)))
 
-#define get_unum_va_args(args, lcount) \
-       (((lcount) > 1) ? va_arg(args, unsigned long long int) :        \
-       ((lcount) ? va_arg(args, unsigned long int) : va_arg(args, unsigned int)))
+#define get_unum_va_args(_args, _lcount) \
+       (((_lcount) > 1) ? va_arg(_args, unsigned long long int) :      \
+       ((_lcount) ? va_arg(_args, unsigned long int) : va_arg(_args, unsigned int)))
 
 void tf_string_print(const char *str)
 {

diff --git a/drivers/arm/gic/v3/gicv3_private.h b/drivers/arm/gic/v3/gicv3_private.h
index db485d245060c75892e292aea3e4347c688ba478..e1c0775f7e1fd63b8d7941d7be26cf6f66310e44 100644 (file)
--- a/drivers/arm/gic/v3/gicv3_private.h
+++ b/drivers/arm/gic/v3/gicv3_private.h
@@ -27,20 +27,20 @@
  * GICD_IROUTER. Bits[31:24] in the MPIDR are cleared as they are not relevant
  * to GICv3.
  */
-#define gicd_irouter_val_from_mpidr(mpidr, irm)                \
-       ((mpidr & ~(0xff << 24)) |                      \
-        (irm & IROUTER_IRM_MASK) << IROUTER_IRM_SHIFT)
+#define gicd_irouter_val_from_mpidr(_mpidr, _irm)              \
+       ((_mpidr & ~(0xff << 24)) |                     \
+        (_irm & IROUTER_IRM_MASK) << IROUTER_IRM_SHIFT)
 
 /*
  * Macro to convert a GICR_TYPER affinity value into a MPIDR value. Bits[31:24]
  * are zeroes.
  */
 #ifdef AARCH32
-#define mpidr_from_gicr_typer(typer_val)       (((typer_val) >> 32) & 0xffffff)
+#define mpidr_from_gicr_typer(_typer_val)      (((_typer_val) >> 32) & 0xffffff)
 #else
-#define mpidr_from_gicr_typer(typer_val)                                \
-       (((((typer_val) >> 56) & MPIDR_AFFLVL_MASK) << MPIDR_AFF3_SHIFT) | \
-        (((typer_val) >> 32) & 0xffffff))
+#define mpidr_from_gicr_typer(_typer_val)                               \
+       (((((_typer_val) >> 56) & MPIDR_AFFLVL_MASK) << MPIDR_AFF3_SHIFT) | \
+        (((_typer_val) >> 32) & 0xffffff))
 #endif
 
 /*******************************************************************************

diff --git a/drivers/arm/smmu/smmu_v3.c b/drivers/arm/smmu/smmu_v3.c
index cfe8c2a473c16bcc862ac6565514a94c134bb050..7b017e3004a93e485e081d8f76fda0d229b1c109 100644 (file)
--- a/drivers/arm/smmu/smmu_v3.c
+++ b/drivers/arm/smmu/smmu_v3.c
@@ -8,8 +8,8 @@
 #include <smmu_v3.h>
 
 /* Test for pending invalidate */
-#define INVAL_PENDING(base)    \
-       smmuv3_read_s_init(base) & SMMU_S_INIT_INV_ALL_MASK
+#define INVAL_PENDING(_base)   \
+       smmuv3_read_s_init(_base) & SMMU_S_INIT_INV_ALL_MASK
 
 static inline uint32_t smmuv3_read_s_idr1(uintptr_t base)
 {

diff --git a/drivers/arm/tzc/tzc400.c b/drivers/arm/tzc/tzc400.c
index 0999fa54a9cf86bdfefae63063f6372769f132df..db4f88a9be2b2669d9222d93bf7a77df6c6ef7fe 100644 (file)
--- a/drivers/arm/tzc/tzc400.c
+++ b/drivers/arm/tzc/tzc400.c
@@ -54,7 +54,7 @@ static inline void _tzc400_write_gate_keeper(uintptr_t base, unsigned int val)
 /*
  * Get the open status information for all filter units.
  */
-#define get_gate_keeper_os(base)       ((_tzc400_read_gate_keeper(base) >>     \
+#define get_gate_keeper_os(_base)      ((_tzc400_read_gate_keeper(_base) >>  \
                                        GATE_KEEPER_OS_SHIFT) &         \
                                        GATE_KEEPER_OS_MASK)
 

diff --git a/include/lib/xlat_tables/aarch32/xlat_tables_aarch32.h b/include/lib/xlat_tables/aarch32/xlat_tables_aarch32.h
index a418d2dd66c0aa30ac15f75c26a3dc37452a4fa0..808589ac31fc0679136fd9150547d687f90fd498 100644 (file)
--- a/include/lib/xlat_tables/aarch32/xlat_tables_aarch32.h
+++ b/include/lib/xlat_tables/aarch32/xlat_tables_aarch32.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -66,7 +66,7 @@
  * valid. Therefore, the caller is expected to check it is the case using the
  * CHECK_VIRT_ADDR_SPACE_SIZE() macro first.
  */
-#define GET_XLAT_TABLE_LEVEL_BASE(virt_addr_space_size)                        \
-       (((virt_addr_space_size) > (ULL(1) << L1_XLAT_ADDRESS_SHIFT)) ? 1 : 2)
+#define GET_XLAT_TABLE_LEVEL_BASE(_virt_addr_space_size)                       \
+       (((_virt_addr_space_size) > (ULL(1) << L1_XLAT_ADDRESS_SHIFT)) ? 1 : 2)
 
 #endif /* __XLAT_TABLES_AARCH32_H__ */

diff --git a/include/lib/xlat_tables/aarch64/xlat_tables_aarch64.h b/include/lib/xlat_tables/aarch64/xlat_tables_aarch64.h
index 6021e4070d442bb413458227a31477780a1b1a28..ad48a358ac0119079e54097ca44799a2e93fe4a2 100644 (file)
--- a/include/lib/xlat_tables/aarch64/xlat_tables_aarch64.h
+++ b/include/lib/xlat_tables/aarch64/xlat_tables_aarch64.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -74,10 +74,10 @@ unsigned long long tcr_physical_addr_size_bits(unsigned long long max_addr);
  * valid. Therefore, the caller is expected to check it is the case using the
  * CHECK_VIRT_ADDR_SPACE_SIZE() macro first.
  */
-#define GET_XLAT_TABLE_LEVEL_BASE(virt_addr_space_size)                                \
-       (((virt_addr_space_size) > (ULL(1) << L0_XLAT_ADDRESS_SHIFT))           \
+#define GET_XLAT_TABLE_LEVEL_BASE(_virt_addr_space_size)                               \
+       (((_virt_addr_space_size) > (ULL(1) << L0_XLAT_ADDRESS_SHIFT))          \
        ? 0                                                                     \
-        : (((virt_addr_space_size) > (ULL(1) << L1_XLAT_ADDRESS_SHIFT))        \
+        : (((_virt_addr_space_size) > (ULL(1) << L1_XLAT_ADDRESS_SHIFT))       \
         ? 1 : 2))
 
 #endif /* __XLAT_TABLES_AARCH64_H__ */

diff --git a/lib/locks/bakery/bakery_lock_coherent.c b/lib/locks/bakery/bakery_lock_coherent.c
index a857e03557b40c884ddc92ee93a46947ab73d070..788ba981846ef8d3ba025c1a6ee5d46015e45d49 100644 (file)
--- a/lib/locks/bakery/bakery_lock_coherent.c
+++ b/lib/locks/bakery/bakery_lock_coherent.c
@@ -34,9 +34,9 @@
  * accesses regardless of status of address translation.
  */
 
-#define assert_bakery_entry_valid(entry, bakery) do {  \
-       assert(bakery);                                 \
-       assert(entry < BAKERY_LOCK_MAX_CPUS);           \
+#define assert_bakery_entry_valid(_entry, _bakery) do {        \
+       assert(_bakery);                                        \
+       assert(_entry < BAKERY_LOCK_MAX_CPUS);          \
 } while (0)
 
 /* Obtain a ticket for a given CPU */

diff --git a/lib/psci/psci_private.h b/lib/psci/psci_private.h
index c58f32969aefd910cadf3916a8faf819d9c63a41..d452e2ae070f0c3391ab5d2bc2368b00b64ffd44 100644 (file)
--- a/lib/psci/psci_private.h
+++ b/lib/psci/psci_private.h
@@ -65,8 +65,8 @@
 
 #endif
 
-#define psci_lock_init(non_cpu_pd_node, idx)                   \
-       ((non_cpu_pd_node)[(idx)].lock_index = (idx))
+#define psci_lock_init(_non_cpu_pd_node, _idx)                 \
+       ((_non_cpu_pd_node)[(_idx)].lock_index = (_idx))
 
 /*
  * The PSCI capability which are provided by the generic code but does not
@@ -96,35 +96,35 @@
 /*
  * Helper macros to get/set the fields of PSCI per-cpu data.
  */
-#define psci_set_aff_info_state(aff_state) \
-               set_cpu_data(psci_svc_cpu_data.aff_info_state, aff_state)
+#define psci_set_aff_info_state(_aff_state) \
+               set_cpu_data(psci_svc_cpu_data.aff_info_state, _aff_state)
 #define psci_get_aff_info_state() \
                get_cpu_data(psci_svc_cpu_data.aff_info_state)
-#define psci_get_aff_info_state_by_idx(idx) \
-               get_cpu_data_by_index(idx, psci_svc_cpu_data.aff_info_state)
-#define psci_set_aff_info_state_by_idx(idx, aff_state) \
-               set_cpu_data_by_index(idx, psci_svc_cpu_data.aff_info_state,\
-                                       aff_state)
+#define psci_get_aff_info_state_by_idx(_idx) \
+               get_cpu_data_by_index(_idx, psci_svc_cpu_data.aff_info_state)
+#define psci_set_aff_info_state_by_idx(_idx, _aff_state) \
+               set_cpu_data_by_index(_idx, psci_svc_cpu_data.aff_info_state,\
+                                       _aff_state)
 #define psci_get_suspend_pwrlvl() \
                get_cpu_data(psci_svc_cpu_data.target_pwrlvl)
-#define psci_set_suspend_pwrlvl(target_lvl) \
-               set_cpu_data(psci_svc_cpu_data.target_pwrlvl, target_lvl)
-#define psci_set_cpu_local_state(state) \
-               set_cpu_data(psci_svc_cpu_data.local_state, state)
+#define psci_set_suspend_pwrlvl(_target_lvl) \
+               set_cpu_data(psci_svc_cpu_data.target_pwrlvl, _target_lvl)
+#define psci_set_cpu_local_state(_state) \
+               set_cpu_data(psci_svc_cpu_data.local_state, _state)
 #define psci_get_cpu_local_state() \
                get_cpu_data(psci_svc_cpu_data.local_state)
-#define psci_get_cpu_local_state_by_idx(idx) \
-               get_cpu_data_by_index(idx, psci_svc_cpu_data.local_state)
+#define psci_get_cpu_local_state_by_idx(_idx) \
+               get_cpu_data_by_index(_idx, psci_svc_cpu_data.local_state)
 
 /*
  * Helper macros for the CPU level spinlocks
  */
-#define psci_spin_lock_cpu(idx)        spin_lock(&psci_cpu_pd_nodes[idx].cpu_lock)
-#define psci_spin_unlock_cpu(idx) spin_unlock(&psci_cpu_pd_nodes[idx].cpu_lock)
+#define psci_spin_lock_cpu(_idx) spin_lock(&psci_cpu_pd_nodes[_idx].cpu_lock)
+#define psci_spin_unlock_cpu(_idx) spin_unlock(&psci_cpu_pd_nodes[_idx].cpu_lock)
 
 /* Helper macro to identify a CPU standby request in PSCI Suspend call */
-#define is_cpu_standby_req(is_power_down_state, retn_lvl) \
-               (((!(is_power_down_state)) && ((retn_lvl) == 0)) ? 1 : 0)
+#define is_cpu_standby_req(_is_power_down_state, _retn_lvl) \
+               (((!(_is_power_down_state)) && ((_retn_lvl) == 0)) ? 1 : 0)
 
 /*******************************************************************************
  * The following two data structures implement the power domain tree. The tree